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Feb 2024 - Volume 16, Issue 1
Deadline: 15 Jan 2025
Publication: 20 Feb 2025
Dec 2024 - Volume 16, Issue 2
Deadline: 15 Mar 2024
Publication: 20 Apr 2024
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ABSTRACT
Title |
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Design of JK Flip-Flop using MODFET Technology |
Authors |
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Ganesan.V, Shaji.K.S |
Keywords |
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Flip-Flop, MODFET, delay, PDP, power consumption. |
Issue Date |
: |
Dec 2013-Jan 2014 |
Abstract |
: |
The pertinent choice of flip-flop topologies is an essential importance in the design of VLSI integrated circuits for high speed and high performance MODFET circuits. Understanding the suitability of flip-flops and selecting the best topology for a given application is an important issue to fulfill the need of the design to satisfy low power and high performance circuit. This paper enumerates high speed design of JK- flip-flop using AlGaAs/GaAs MODFET. The proposed Flip Flop is having less number of transistors than existing designs. Simulation results show lowest average power and least delay than existing designs. This Flip-Flop having less number of transistors. It can be efficiently used in VLSI ICs. In the verification by simulation, the proposed flip-flops appear to have better speed of operation. It is simple and suitable to SPICE simulation of hybrid digital ICs. |
Page(s) |
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474-480 |
ISSN |
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0976-5166 |
Source |
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Vol. 4, No.6 |
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